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74 lines
2.9 KiB
Markdown
74 lines
2.9 KiB
Markdown
---
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title: Memory
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description:
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draft: false
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tags:
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- computer-science
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author: TrudeEH
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showToc: true
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---
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## Remembering Data
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An `OR` gate could be used to store a single bit.
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If the input `A` is changed to `1`, the `OR` gate will output `1`, and then receive it.
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Even after the input `A` is set to `0`, the output does not change. The `OR` gate "remembers" that, at one point in the past, the `A` input was set to `1`.
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The inverse can be done with an `AND` gate.
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To remember either a `1` or a `0`, we can do the following:
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### AND-OR LATCH
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The input `A` sets the output to `1`, and the input `B` sets the output to `0`. This circuit is able to store a bit of information, while powered on, even after both inputs are set to `0`.
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A slightly more advanced and intuitive version can be built as follows:
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### GATED LATCH
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The input `A` is the value to store, and when `B` is set to `1`, the value is stored.
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This is not the only way to store data using logic gates, but it is one of the simplest.
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## Registers
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A single bit isn't very useful, so we can use the previous circuit to create an 8bit register.
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## Binary Decoder
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Select which circuit to activate, depending on the task at hand.
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## RAM
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Registers don't scale well, however, as storing a large amount of data would require millions of wires.
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We can organize latches in a matrix instead of a long, horizontal line.
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To access a specific latch, binary decoders can be used.
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This way, a single, short memory address can select any latch in the matrix.
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### Reading and Writing to the Matrix
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We can modify the latch to reduce the amount of wires needed.
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This new latch uses the same wire for both input and output.
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This circuit would store the same value on every latch, which isn't useful. With some modifications, however, we can use the memory address to select which latch to modify.
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### Storing Bytes Instead of Bits
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In this example, we can provide 1 byte of information, a `write` or `read` signal, and a memory address. Since we are storing a full byte, the same memory address applies for all 8, single bit circuits.
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This configuration is more commonly known as **RAM**.
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To make it easier to understand, we can abstract these concepts further.
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The largest the Address Bus is, the more bits can be managed. This is why a 32bit CPU can't manage more than 4 GB of RAM.
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This kind of RAM is Static RAM (**S**RAM), which uses many transistors, making it faster, but more expensive to produce than **D**RAM.
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