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content/notes/ready/memory/index.md

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 title: Memory
 description: 
-date: 2025-02-17T08:22:26+00:00
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 tags:
   - computer-science
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 ## Remembering Data
 
 An `OR` gate could be used to store a single bit.  
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 If the input `A` is changed to `1`, the `OR` gate will output `1`, and then receive it.  
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 Even after the input `A` is set to `0`, the output does not change. The `OR` gate "remembers" that, at one point in the past, the `A` input was set to `1`.  
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 The inverse can be done with an `AND` gate.  
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 To remember either a `1` or a `0`, we can do the following:  
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 ### AND-OR LATCH
 
 The input `A` sets the output to `1`, and the input `B` sets the output to `0`. This circuit is able to store a bit of information, while powered on, even after both inputs are set to `0`.  
 A slightly more advanced and intuitive version can be built as follows:  
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 ### GATED LATCH
 
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 ## Registers
 
 A single bit isn't very useful, so we can use the previous circuit to create an 8bit register.  
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 ## Binary Decoder
 
 Select which circuit to activate, depending on the task at hand.  
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 ## RAM
 
 Registers don't scale well, however, as storing a large amount of data would require millions of wires.  
 We can organize latches in a matrix instead of a long, horizontal line.  
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 To access a specific latch, binary decoders can be used.  
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 This way, a single, short memory address can select any latch in the matrix.
 
 ### Reading and Writing to the Matrix
 
 We can modify the latch to reduce the amount of wires needed.  
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 This new latch uses the same wire for both input and output.  
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 This circuit would store the same value on every latch, which isn't useful. With some modifications, however, we can use the memory address to select which latch to modify.  
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 ### Storing Bytes Instead of Bits
 
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 In this example, we can provide 1 byte of information, a `write` or `read` signal, and a memory address. Since we are storing a full byte, the same memory address applies for all 8, single bit circuits.  
 This configuration is more commonly known as **RAM**.  
 To make it easier to understand, we can abstract these concepts further.  
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 The largest the Address Bus is, the more bits can be managed. This is why a 32bit CPU can't manage more than 4 GB of RAM.  
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 This kind of RAM is Static RAM (**S**RAM), which uses many transistors, making it faster, but more expensive to produce than **D**RAM.