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INC: How to build a computer
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---
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title: CPU Architecture
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description:
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draft: false
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tags:
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||||
- computer-science
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author: TrudeEH
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showToc: true
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||||
---
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||||
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||||
## Components
|
||||
|
||||
### Registers
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||||
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||||
We can combine registers to reduce the amount of wires needed.
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||||
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||||
Using a data bus (wiring at the top) and a binary decoder, we can select which register to read/write to.
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||||
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||||
### Memory
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||||
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||||
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## Assembly
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Assembly is a human-friendly representation of code: binary values that a computer can understand.
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An assembler converts ASM instructions into machine code, which is given to the CPU as input.
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### Arithmetic Operations
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For example, a simple computer architecture could use `00` to represent arithmetic operations.
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To decide which type of operation to execute (subtraction, multiplication, addition, etc), the 3rd and 4th bits could be used.
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Using a [index](ready/binary_operations/index.md), we can build an inefficient, but simple circuit to do this.
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This type of circuit is an Arithmetic Logic Unit (ALU).
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### Memory Operations
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Of course, assembly can also provide instructions to store or load values.
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#### Load
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```Assembly
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LOAD R2 1000 ;Load into register 2 the value in the memory address 1000
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```
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#### Store
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```Assembly
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STORE R1 0110 ;Store the value in register 1 into the 0110 memory address
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```
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||||
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||||
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||||
#### Select Which Instruction to Execute (first 2 bits)
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||||
|
||||
To decide which operation to execute, a binary decoder can be used.
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||||
|
||||
For memory operations, the 3rd and 4th bits are used to select which register to use.
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The last 4 bits represent the memory address to read/write to.
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||||
|
||||
|
||||
### Instruction Register
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||||
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For the instruction to be given, it is stored in a special register: An Instruction Register.
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||||
|
||||
|
||||
### Optimization
|
||||
|
||||
We can use a single Binary Decoder instead of two, to achieve the same result. (Optimization on the right pane)
|
||||
|
||||
Different architectures can have the exact same functionality, while being implemented differently, or even having different instructions. This is why code that is compiled for Intel x64 is not compatible with ARM or RISC-V.
|
||||
|
||||
## Control Unit
|
||||
|
||||
We can finally add the ALU (Arithmetic Logic Unit) we built before into the new circuit, like so:
|
||||
|
||||
The gray trapezoids are multiplexers:
|
||||
|
||||
The output value is then stored in a temporary register, before replacing the first operand register's value.
|
||||
The component we just built to control the `ALU` is part of a `Control Unit`. The full `control unit` is very complex, as it needs to handle every possible instruction. (So far, we have seen how to implement the `ALU` and `RAM`.)
|
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Each register in the `CU` has a specific purpose, unlike `RAM`, which can be used to store any values.
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||||
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To read the first instruction, the `CU` will **fetch** data from the first address in memory.
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After **fetching**, the `CU` will **decode** the instruction: interpret the bit sequence in the `instruction register`, to send the necessary signals to the components that will **execute** the instruction. We can finally load instructions into the instruction register.
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Then, the `CU` increments 1 byte, to point the `address register` to the next instruction. (Modern architectures increment different values, as the instruction set is more complex)
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If the instruction is an arithmetic operation, the steps are similar. The ALU stores the output in a temporary register, which overwrites the register 0 with the result. The result can then be stored in `RAM`.
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|
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## Load a Program Into Memory
|
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So far, we can store instructions in memory, but it is also necessary to store values, besides from the instructions themselves.
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For example:
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This program uses 2 numeric values. The first 2 instructions load these values into the registers, and then, these values are added together and stored in another memory address. The final instruction, `HALT`, marks the end of the program, to make sure the `CU` does not attempt to read the number 20 as an instruction.
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If the program is extended, all memory addresses must be altered. To fix this issue, we can instead store values at the end of the memory stack.
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## Conditions and Loops
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To create a loop, we can simply jump to a smaller address in memory.
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Internally, the `JMP` command overwrites the Address Register, making it so that the next CPU **cycle** *fetches* the chosen memory address, instead of the next one.
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### Flags
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Sometimes, we might want to loop only if a certain condition is met.
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For context, imagine subtracting a number from itself. In this case, the ALU will provide some extra information, using 1 bit registers called `flags`.
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| N | Flag | Description |
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| --- | ------------ | --------------------------------------------------------- |
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| 0 | **O**verflow | When a number is too large to fit in the output register. |
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| 1 | **Z**ero | When the result is zero. |
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| 0 | **N**egative | When a number is negative. |
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This additional information can be used to make decisions, and make **conditional jumps** possible.
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||||
| ASM | Command | Description |
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||||
| -------------- | ------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
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| `JMP_OFW XXXX` | Jump Overflow | Overwrites the `Address Register` with the value `XXXX` if the `O_FLAG` is **ON**. If the flag is **OFF**, the `Address Register`'s value is incremented by **1**. |
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||||
| `JMP_ZRO XXXX` | Jump Zero | Overwrites the `Address Register` with the value `XXXX` if the `Z_FLAG` is **ON**. If the flag is **OFF**, the `Address Register`'s value is incremented by **1**. |
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||||
| `JMP_NEG XXXX` | Jump Negative | Overwrites the `Address Register` with the value `XXXX` if the `N_FLAG` is **ON**. If the flag is **OFF**, the `Address Register`'s value is incremented by **1**. |
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||||
| `JMP_ABV XXXX` | Jump Above | Overwrites the `Address Register` with the value `XXXX` if **neither** the `Z_FLAG` nor `N_FLAG` are **ON**. If either is **ON,** the `Address Register`'s value is incremented by **1**. |
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|
||||
Comparing two numbers is the same as subtracting them.
|
||||
|
||||
$$a - 5 = b$$
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|
||||
| **b** is negative | **b** is zero | **b** is positive |
|
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| ----------------- | ------------- | ----------------- |
|
||||
| then | then | then |
|
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| a < 5 | a == 5 | a > 5 |
|
||||
|
||||
For example:
|
||||
|
||||
An `IF` statement works in the exact same way, but without the need to loop:
|
||||
|
||||
Note: These instructions are not from any real architecture. These are examples for this simple, custom architecture.
|
||||
|
||||
## Clock
|
||||
|
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The final piece of the puzzle is the clock. A clock can give us time before a circuit loops.
|
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|
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This is necessary, because energy travels extremely quickly, and so, all memory would be reset before we could even use the stored values. Each clock tick corresponds to an action the `CU` performs (fetch, decode and execute).
|
||||
A `Data FLIP-FLOP`, for example, uses the clock to store data, acting as the manual `RESET` input.
|
||||
|
||||
This circuit can be used to build a single bit register.
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|
||||
To generate a clock pulse, we can use a circuit similar to this one:
|
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|
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@@ -533,17 +533,19 @@ A Set-Reset Latch is the simplest one. The `S` input sets the output to `1`, and
|
||||
|
||||
#### D Latch
|
||||
|
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A Data Latch has two inputs: `D` (Data) and `E` (Enable). When the `E` input is high, the output `Q` follows the input `D`. When the `E` input is low, the output `Q` holds the last value of `D`.
|
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|
||||
![[image.png]]
|
||||
|
||||
### 8bit Register
|
||||
|
||||
After obtaining one bit of memory, a byte of memory can be built.
|
||||
After obtaining one bit of memory (the hexagon component), a byte of memory can be built.
|
||||
|
||||
![[8bit_register.png]]
|
||||
|
||||
### Binary Decoder
|
||||
|
||||
A decoder splits two states of a bit into two separate outputs.
|
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A decoder splits the two states of a bit into two separate outputs.
|
||||
|
||||
![[decoder.png]]
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||||
|
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@@ -551,28 +553,22 @@ A decoder splits two states of a bit into two separate outputs.
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||||
|
||||
![[3bit_decoder.png]]
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||||
|
||||
---
|
||||
### Counter
|
||||
|
||||
## Registers
|
||||
A counter adds 1 every tick (clock cycle) to its output. If needed, it can also be overwritten to any given value.
|
||||
|
||||
A single bit isn't very useful, so we can use the previous circuit to create an 8bit register.
|
||||
|
||||
![[Pasted image 20250307115740.png]]
|
||||
|
||||
## Binary Decoder
|
||||
### RAM
|
||||
|
||||
Select which circuit to activate, depending on the task at hand.
|
||||
|
||||
We could add more registers to store as much data as needed, however, these don't scale well, as storing a lot of data would require millions of wires. To solve this issue, we can organize latches in a matrix instead of a long, horizontal line.
|
||||
|
||||
## RAM
|
||||
|
||||
Registers don't scale well, however, as storing a large amount of data would require millions of wires.
|
||||
We can organize latches in a matrix instead of a long, horizontal line.
|
||||
|
||||
To access a specific latch, binary decoders can be used.
|
||||
|
||||
This way, a single, short memory address can select any latch in the matrix.
|
||||
|
||||
### Reading and Writing to the Matrix
|
||||
#### Reading and Writing to the Matrix
|
||||
|
||||
We can modify the latch to reduce the amount of wires needed.
|
||||
|
||||
@@ -582,16 +578,208 @@ This circuit would store the same value on every latch, which isn't useful. With
|
||||
|
||||
|
||||
|
||||
### Storing Bytes Instead of Bits
|
||||
#### Storing Bytes Instead of Bits
|
||||
|
||||
|
||||
In this example, we can provide 1 byte of information, a `write` or `read` signal, and a memory address. Since we are storing a full byte, the same memory address applies for all 8, single bit circuits.
|
||||
This configuration is more commonly known as **RAM**.
|
||||
To make it easier to understand, we can abstract these concepts further.
|
||||
|
||||
The largest the Address Bus is, the more bits can be managed. This is why a 32bit CPU can't manage more than 4 GB of RAM.
|
||||
To make it easier to understand, we can abstract these concepts further:
|
||||
![[Pasted image 20250307134315.png]]
|
||||
|
||||
The larger the Address Bus is, the more bits can be managed. This is why a 32bit CPU can't manage more than 4 GB of RAM.
|
||||
|
||||
|
||||
This kind of RAM is Static RAM (**S**RAM), which uses many transistors, making it faster, but more expensive to produce than **D**RAM.
|
||||
|
||||
This kind of RAM is Static RAM (**S**RAM), which uses many transistors, making it faster, but is more expensive to produce than **D**RAM.
|
||||
|
||||
## CPU Architecture
|
||||
|
||||
### ALU
|
||||
|
||||
An ALU (Arithmetic Logic Unit) performs bitwise operations (OR, AND, NOR, NAND) and basic math (ADD, SUB). You can also add any other arithmetic functionality to it, such as multiplication and division.
|
||||
|
||||
This circuit uses the following instructions:
|
||||
- `0` OR
|
||||
- `1` NAND
|
||||
- `2` NOR
|
||||
- `3` AND
|
||||
- `4` ADD
|
||||
- `5` SUB
|
||||
|
||||
![[Pasted image 20250307131641.png]]
|
||||
|
||||
This ALU can also be optimized to use fewer gates:
|
||||
|
||||
![[Pasted image 20250307131757.png]]
|
||||
|
||||
### Conditions
|
||||
|
||||
Conditions allow the CPU to compare values. In this case, values are compared against 0.
|
||||
|
||||
Instructions:
|
||||
- `0` Never (Always output 0)
|
||||
- `1` If value = 0
|
||||
- `2` If value < 0
|
||||
- `3` If value ≤ 0
|
||||
- `4` Always (Always output 1)
|
||||
- `5` If value ≠ 0
|
||||
- `6` If value ≥ 0
|
||||
- `7` If value > 0
|
||||
|
||||
![[Pasted image 20250307135207.png]]
|
||||
|
||||
### Instruction Decoder
|
||||
|
||||
A binary decoder, adapted to use the last 2 bits of a byte.
|
||||
|
||||
Instructions:
|
||||
- `0` Immediate
|
||||
- `64` Calculation
|
||||
- `128` Copy
|
||||
- `192` Condition
|
||||
|
||||
![[Pasted image 20250307140353.png]]
|
||||
|
||||
## Putting it All Together
|
||||
|
||||
### Upgraded Register
|
||||
|
||||
Adding an output pin to always output the register's value will prove to be useful in the future.
|
||||
|
||||
![[Pasted image 20250307164854.png]]
|
||||
|
||||
### Registers
|
||||
|
||||
TODO
|
||||
|
||||
![[Pasted image 20250307165834.png]]
|
||||
|
||||
---
|
||||
|
||||
### Assembly
|
||||
|
||||
Assembly is a human-friendly representation of code: binary values that a computer can understand.
|
||||
|
||||
|
||||
|
||||
An assembler converts ASM instructions into machine code, which is given to the CPU as input.
|
||||
|
||||
For example, a simple computer architecture could use `00` to represent arithmetic operations.
|
||||
|
||||
|
||||
|
||||
These instructions are then read by the ALU we built previously, and this is how the computer 'knows' which operation to perform.
|
||||
|
||||
Of course, assembly can also provide instructions to store or load values from memory.
|
||||
|
||||
|
||||
|
||||
#### Select Which Instruction to Execute (first 2 bits)
|
||||
|
||||
A binary decoder is the perfect component to decide which instruction to execute.
|
||||
|
||||
|
||||
|
||||
For memory operations, the 3rd and 4th bits are used to select which register to use.
|
||||
|
||||
|
||||
|
||||
The last 4 bits represent the memory address to read/write to.
|
||||
|
||||
|
||||
|
||||
### Instruction Register
|
||||
|
||||
For the instruction to be given, it is stored in a special register: An Instruction Register.
|
||||
|
||||
|
||||
### Optimization
|
||||
|
||||
We can use a single Binary Decoder instead of two, to achieve the same result. (Optimization on the right pane)
|
||||
|
||||
Different architectures can have the exact same functionality, while being implemented differently, or even having different instructions. This is why code that is compiled for Intel x64 is not compatible with ARM or RISC-V.
|
||||
|
||||
## Control Unit
|
||||
|
||||
We can finally add the ALU (Arithmetic Logic Unit) we built before into the new circuit, like so:
|
||||
|
||||
The gray trapezoids are multiplexers:
|
||||
|
||||
The output value is then stored in a temporary register, before replacing the first operand register's value.
|
||||
The component we just built to control the `ALU` is part of a `Control Unit`. The full `control unit` is very complex, as it needs to handle every possible instruction. (So far, we have seen how to implement the `ALU` and `RAM`.)
|
||||
|
||||
Each register in the `CU` has a specific purpose, unlike `RAM`, which can be used to store any values.
|
||||
|
||||
To read the first instruction, the `CU` will **fetch** data from the first address in memory.
|
||||
|
||||
After **fetching**, the `CU` will **decode** the instruction: interpret the bit sequence in the `instruction register`, to send the necessary signals to the components that will **execute** the instruction. We can finally load instructions into the instruction register.
|
||||
|
||||
Then, the `CU` increments 1 byte, to point the `address register` to the next instruction. (Modern architectures increment different values, as the instruction set is more complex)
|
||||
If the instruction is an arithmetic operation, the steps are similar. The ALU stores the output in a temporary register, which overwrites the register 0 with the result. The result can then be stored in `RAM`.
|
||||
|
||||
|
||||
## Load a Program Into Memory
|
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||||
So far, we can store instructions in memory, but it is also necessary to store values, besides from the instructions themselves.
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For example:
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||||
This program uses 2 numeric values. The first 2 instructions load these values into the registers, and then, these values are added together and stored in another memory address. The final instruction, `HALT`, marks the end of the program, to make sure the `CU` does not attempt to read the number 20 as an instruction.
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If the program is extended, all memory addresses must be altered. To fix this issue, we can instead store values at the end of the memory stack.
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||||
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## Conditions and Loops
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||||
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||||
To create a loop, we can simply jump to a smaller address in memory.
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||||
Internally, the `JMP` command overwrites the Address Register, making it so that the next CPU **cycle** *fetches* the chosen memory address, instead of the next one.
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||||
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||||
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### Flags
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||||
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||||
Sometimes, we might want to loop only if a certain condition is met.
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||||
For context, imagine subtracting a number from itself. In this case, the ALU will provide some extra information, using 1 bit registers called `flags`.
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||||
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||||
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||||
| N | Flag | Description |
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||||
| --- | ------------ | --------------------------------------------------------- |
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||||
| 0 | **O**verflow | When a number is too large to fit in the output register. |
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||||
| 1 | **Z**ero | When the result is zero. |
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||||
| 0 | **N**egative | When a number is negative. |
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||||
|
||||
This additional information can be used to make decisions, and make **conditional jumps** possible.
|
||||
|
||||
| ASM | Command | Description |
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||||
| -------------- | ------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
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||||
| `JMP_OFW XXXX` | Jump Overflow | Overwrites the `Address Register` with the value `XXXX` if the `O_FLAG` is **ON**. If the flag is **OFF**, the `Address Register`'s value is incremented by **1**. |
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||||
| `JMP_ZRO XXXX` | Jump Zero | Overwrites the `Address Register` with the value `XXXX` if the `Z_FLAG` is **ON**. If the flag is **OFF**, the `Address Register`'s value is incremented by **1**. |
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||||
| `JMP_NEG XXXX` | Jump Negative | Overwrites the `Address Register` with the value `XXXX` if the `N_FLAG` is **ON**. If the flag is **OFF**, the `Address Register`'s value is incremented by **1**. |
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||||
| `JMP_ABV XXXX` | Jump Above | Overwrites the `Address Register` with the value `XXXX` if **neither** the `Z_FLAG` nor `N_FLAG` are **ON**. If either is **ON,** the `Address Register`'s value is incremented by **1**. |
|
||||
|
||||
Comparing two numbers is the same as subtracting them.
|
||||
|
||||
$$a - 5 = b$$
|
||||
|
||||
| **b** is negative | **b** is zero | **b** is positive |
|
||||
| ----------------- | ------------- | ----------------- |
|
||||
| then | then | then |
|
||||
| a < 5 | a == 5 | a > 5 |
|
||||
|
||||
For example:
|
||||
|
||||
An `IF` statement works in the exact same way, but without the need to loop:
|
||||
|
||||
Note: These instructions are not from any real architecture. These are examples for this simple, custom architecture.
|
||||
|
||||
## Clock
|
||||
|
||||
The final piece of the puzzle is the clock. A clock can give us time before a circuit loops.
|
||||
|
||||
This is necessary, because energy travels extremely quickly, and so, all memory would be reset before we could even use the stored values. Each clock tick corresponds to an action the `CU` performs (fetch, decode and execute).
|
||||
A `Data FLIP-FLOP`, for example, uses the clock to store data, acting as the manual `RESET` input.
|
||||
|
||||
This circuit can be used to build a single bit register.
|
||||
|
||||
To generate a clock pulse, we can use a circuit similar to this one:
|
||||
|
||||
|
||||
## ASCII
|
||||
|
||||
|
||||
Reference in New Issue
Block a user