diff --git a/content/.obsidian/workspace.json b/content/.obsidian/workspace.json index 569265f..b7fc3b2 100644 --- a/content/.obsidian/workspace.json +++ b/content/.obsidian/workspace.json @@ -4,11 +4,11 @@ "type": "split", "children": [ { - "id": "929b0fcada89ed0e", + "id": "da1c1c5ba8d6b94f", "type": "tabs", "children": [ { - "id": "28c9848f88828495", + "id": "ab03f7100c1ce0fb", "type": "leaf", "state": { "type": "markdown", @@ -20,18 +20,6 @@ "icon": "lucide-file", "title": "index" } - }, - { - "id": "5b5978f088ca6b22", - "type": "leaf", - "state": { - "type": "image", - "state": { - "file": "notes/ready/how_to_computer/input_selector.png" - }, - "icon": "lucide-image", - "title": "input_selector" - } } ] } @@ -167,7 +155,7 @@ } ], "direction": "horizontal", - "width": 249.5 + "width": 200 }, "left-ribbon": { "hiddenItems": { @@ -181,26 +169,22 @@ "table-editor-obsidian:Advanced Tables Toolbar": false } }, - "active": "b73f137a8a755c19", + "active": "ab03f7100c1ce0fb", "lastOpenFiles": [ - "notes/ready/how_to_computer/input_selector.png", + "3bit_decoder.png", "notes/ready/how_to_computer/index.md", - "notes/ready/how_to_computer/bit_switch.png", - "notes/ready/how_to_computer/bus.png", - "notes/ready/how_to_computer/signed_negator.png", - "notes/ready/how_to_computer/full_adder_8bit.png", - "notes/ready/how_to_computer/full_adder.png", - "notes/ready/how_to_computer/half_adder.png", - "notes/ready/binary_operations/index.md", - "notes/ready/how_to_computer/image.png", - "notes/ready/how_to_computer/OR_gates_big.png", - "notes/ready/how_to_computer/image4.png", - "TODO.md", - "notes/ready/transistors/index.md", - "notes/ready/diodes.md", - "notes/drafts/nvim.md", - "notes/drafts/linux/index.md", + "decoder.png", + "Pasted image 20250224154920.png", + "Pasted image 20250224154916.png", + "transistor_latch.png", + "8bit_register.png", + "notes/ready/memory/index.md", "posts/notes-update.md", + "notes/ready/how_to_computer/signed_negator.png", + "notes/ready/how_to_computer/input_selector.png", + "notes/ready/how_to_computer/image49.png", + "notes/ready/how_to_computer/image47.png", + "notes/ready/how_to_computer", "_Templates/post.md", "_Templates/note.md", "posts/personal-web.md", @@ -208,15 +192,20 @@ "posts/local-llm.md", "posts/nix-starter-guide.md", "posts/dotfiles.md", + "notes/drafts/linux/index.md", + "TODO.md", "notes/ready/flask.md", "notes/ready/gdb.md", "notes/ready/git.md", "notes/ready/http.md", "notes/ready/html.md", + "notes/ready/binary_operations/index.md", "notes/ready/firewall.md", "drafts/nvim.md", "drafts/rust.md", "drafts/swift.md", - "drafts/TODO.md" + "drafts/TODO.md", + "drafts/Untitled.md", + "drafts/hardware-tools.md" ] } \ No newline at end of file diff --git a/content/3bit_decoder.png b/content/3bit_decoder.png new file mode 100644 index 0000000..f136a36 Binary files /dev/null and b/content/3bit_decoder.png differ diff --git a/content/8bit_register.png b/content/8bit_register.png new file mode 100644 index 0000000..5765433 Binary files /dev/null and b/content/8bit_register.png differ diff --git a/content/Pasted image 20250224154916.png b/content/Pasted image 20250224154916.png new file mode 100644 index 0000000..a2bd19b Binary files /dev/null and b/content/Pasted image 20250224154916.png differ diff --git a/content/Pasted image 20250224154920.png b/content/Pasted image 20250224154920.png new file mode 100644 index 0000000..a2bd19b Binary files /dev/null and b/content/Pasted image 20250224154920.png differ diff --git a/content/decoder.png b/content/decoder.png new file mode 100644 index 0000000..a2bd19b Binary files /dev/null and b/content/decoder.png differ diff --git a/content/notes/ready/memory/image80.png b/content/notes/ready/how_to_computer/image80.png similarity index 100% rename from content/notes/ready/memory/image80.png rename to content/notes/ready/how_to_computer/image80.png diff --git a/content/notes/ready/how_to_computer/index.md b/content/notes/ready/how_to_computer/index.md index de8cb1f..45e991d 100644 --- a/content/notes/ready/how_to_computer/index.md +++ b/content/notes/ready/how_to_computer/index.md @@ -530,7 +530,105 @@ A Bus is useful to simplify wiring. One bit controls which input should be selec ![[bus.png]] -### ASCII +### 1 Bit of Memory + +There are many ways to achieve a bit of memory. + +#### Using Transistors and a Tick Delay + +The oval component is a delay. This replaces the concept of a clock, however, in an electronic circuit, the save and load states are attached to a clock. + +![[transistor_latch.png]] + +#### AND-OR Latch + +TODO!!! + +![image80](image80.png) + +### 8bit Register + +After obtaining one bit of memory, a byte of memory can be built. + +![[8bit_register.png]] + +### Binary Decoder + +A decoder splits two states of a bit into two separate outputs. + +![[decoder.png]] + +### 3bit Decoder + +![[3bit_decoder.png]] + +--- + +## Remembering Data + +An `OR` gate could be used to store a single bit. +![image76](image76.png) +If the input `A` is changed to `1`, the `OR` gate will output `1`, and then receive it. +![image77](image77.png) +Even after the input `A` is set to `0`, the output does not change. The `OR` gate "remembers" that, at one point in the past, the `A` input was set to `1`. +![image78](image78.png) +The inverse can be done with an `AND` gate. +![image79](image79.png) +To remember either a `1` or a `0`, we can do the following: + + +### AND-OR LATCH + +The input `A` sets the output to `1`, and the input `B` sets the output to `0`. This circuit is able to store a bit of information, while powered on, even after both inputs are set to `0`. +A slightly more advanced and intuitive version can be built as follows: +![image81](image81.png) + +### GATED LATCH + +The input `A` is the value to store, and when `B` is set to `1`, the value is stored. +This is not the only way to store data using logic gates, but it is one of the simplest. + +## Registers + +A single bit isn't very useful, so we can use the previous circuit to create an 8bit register. +![image82](image82.png) + +## Binary Decoder + +Select which circuit to activate, depending on the task at hand. +![image83](image83.png) + +## RAM + +Registers don't scale well, however, as storing a large amount of data would require millions of wires. +We can organize latches in a matrix instead of a long, horizontal line. +![image84](image84.png) +To access a specific latch, binary decoders can be used. +![image85](image85.png) +This way, a single, short memory address can select any latch in the matrix. + +### Reading and Writing to the Matrix + +We can modify the latch to reduce the amount of wires needed. +![image86](image86.png) +This new latch uses the same wire for both input and output. +![image87](image87.png) +This circuit would store the same value on every latch, which isn't useful. With some modifications, however, we can use the memory address to select which latch to modify. +![image88](image88.png) +![image89](image89.png) + +### Storing Bytes Instead of Bits + +![image90](image90.png) +In this example, we can provide 1 byte of information, a `write` or `read` signal, and a memory address. Since we are storing a full byte, the same memory address applies for all 8, single bit circuits. +This configuration is more commonly known as **RAM**. +To make it easier to understand, we can abstract these concepts further. +![image91](image91.png) +The largest the Address Bus is, the more bits can be managed. This is why a 32bit CPU can't manage more than 4 GB of RAM. +![image92](image92.png) +This kind of RAM is Static RAM (**S**RAM), which uses many transistors, making it faster, but more expensive to produce than **D**RAM. + +## ASCII Binary can also be used to represent characters. diff --git a/content/notes/ready/memory/index.md b/content/notes/ready/memory/index.md deleted file mode 100644 index 027ab21..0000000 --- a/content/notes/ready/memory/index.md +++ /dev/null @@ -1,73 +0,0 @@ ---- -title: Memory -description: -draft: false -tags: - - computer-science -author: TrudeEH -showToc: true ---- - -## Remembering Data - -An `OR` gate could be used to store a single bit. -![image76](image76.png) -If the input `A` is changed to `1`, the `OR` gate will output `1`, and then receive it. -![image77](image77.png) -Even after the input `A` is set to `0`, the output does not change. The `OR` gate "remembers" that, at one point in the past, the `A` input was set to `1`. -![image78](image78.png) -The inverse can be done with an `AND` gate. -![image79](image79.png) -To remember either a `1` or a `0`, we can do the following: -![image80](image80.png) - -### AND-OR LATCH - -The input `A` sets the output to `1`, and the input `B` sets the output to `0`. This circuit is able to store a bit of information, while powered on, even after both inputs are set to `0`. -A slightly more advanced and intuitive version can be built as follows: -![image81](image81.png) - -### GATED LATCH - -The input `A` is the value to store, and when `B` is set to `1`, the value is stored. -This is not the only way to store data using logic gates, but it is one of the simplest. - -## Registers - -A single bit isn't very useful, so we can use the previous circuit to create an 8bit register. -![image82](image82.png) - -## Binary Decoder - -Select which circuit to activate, depending on the task at hand. -![image83](image83.png) - -## RAM - -Registers don't scale well, however, as storing a large amount of data would require millions of wires. -We can organize latches in a matrix instead of a long, horizontal line. -![image84](image84.png) -To access a specific latch, binary decoders can be used. -![image85](image85.png) -This way, a single, short memory address can select any latch in the matrix. - -### Reading and Writing to the Matrix - -We can modify the latch to reduce the amount of wires needed. -![image86](image86.png) -This new latch uses the same wire for both input and output. -![image87](image87.png) -This circuit would store the same value on every latch, which isn't useful. With some modifications, however, we can use the memory address to select which latch to modify. -![image88](image88.png) -![image89](image89.png) - -### Storing Bytes Instead of Bits - -![image90](image90.png) -In this example, we can provide 1 byte of information, a `write` or `read` signal, and a memory address. Since we are storing a full byte, the same memory address applies for all 8, single bit circuits. -This configuration is more commonly known as **RAM**. -To make it easier to understand, we can abstract these concepts further. -![image91](image91.png) -The largest the Address Bus is, the more bits can be managed. This is why a 32bit CPU can't manage more than 4 GB of RAM. -![image92](image92.png) -This kind of RAM is Static RAM (**S**RAM), which uses many transistors, making it faster, but more expensive to produce than **D**RAM. diff --git a/content/transistor_latch.png b/content/transistor_latch.png new file mode 100644 index 0000000..76cd00d Binary files /dev/null and b/content/transistor_latch.png differ